Passive element memory arrays, such as anti-fuse diode cell arrays, require a high-voltage and high-current programming voltage source due to the large number of leakage paths in the array and the high voltage required to program the element conductivity. The write power dissipation is dominated by the power of the programming voltage source, and the write power increases the temperature of the memory. As the temperature of the diodes increases, the diode leakage current and the write power further increase, and this feedback can cause thermal run-away and failure of the memory. To reduce the chance of thermal run-away, the memory can be designed with smaller sub-arrays and a lower data rate. However, this design increases the cost per unit of storage capacity and results in a relatively slow memory device.
There is a need, therefore, for a memory device and method that will avoid thermal run-away while maintaining a relatively low cost and high data rate.
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the preferred embodiments described below provide a memory device and method for temperature-based control over write and/or read operations. In one preferred embodiment, the temperature of a memory array is monitored, and a write operation to the memory array is prevented in response to the monitored temperature reaching a threshold temperature. In another preferred embodiment, the temperature of a memory array is monitored, and a read operation from the memory array is prevented in response to the monitored temperature reaching a threshold temperature. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
The preferred embodiments will now be described with reference to the attached drawings.